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Advanced submicron, low-power CMOS technology About External Card Reader Drivers: PCI power-management D0, D1, D2, and D3 power states Power-down features to conserve energy in battery-powered applications include: automatic device power down during suspend Compliant with Intel Mobile Power Guideline 2000 Provides VGA/palette memory and I/O, and subtractive decoding options, LED activity terminals Supports ring indicate, SUSPEND, and PCI CLKRUN protocols and PCI bus Lock (LOCK) ExCA-compatible registers are mapped in memory or I/O space
#MASS STORAGE CONTROLLER DRIVER SONY WINDOWS 7 SERIAL#
Serial ROM interface for loading subsystem ID and subsystem vendor ID
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Supports serialized IRQ with PCI interrupts Supports 132-MBps burst transfers to maximize data throughput on both the PCI bus and the CardBus Supports PC Card or CardBus with hot insertion and removal
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Universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments 1.5-V core logic and 3.3-V I/O cells with internal voltage regulator to generate 1.5-V core VCC PCI Bus Interface Specification for PCI-to-CardBus Bridges PCI Local Bus Specification Revision 2.3 compliant Advanced Configuration and Power Interface (ACPI) Specification 2.0 compliant PCI Bus Power Management Interface Specification 1.1 compliant